Today's high performance microprocessors require large, high speed data transfer capability between the central processing unit (CPU) and external memory, and peripheral devices. These high performance microprocessors operate in an environment that imposes constraints, such as transfer size and transfer protocol, which limit the overall system performance. Consequently, modern microprocessors uses block transfers (e.g. burst transfers) to partially offset bus bandwidth limitations. These block transfers reduce the ratio of transfer protocol to transfer data, and utilize the maximum bus width for each data transfer.
In the prior art, microprocessors use automatic burst transfers only under special conditions which require movement of data types larger than the maximum data size (e.g. load/unload of a cache line containing multiple processor data words). Since the use of burst transfers is limited to these special cases, other types of block movements of data which are under program control (e.g. DMA, block moves, memory page initialization, and transferring instructions/data to detached coprocessors) can not achieve maximum utilization of the system bus, and system performance is degraded.